In the design and construction of systems for radio frequency (RF) generation, it is desirable to develop systems with increased switching speeds and reduced power consumption. Switching power amplifiers are commonly implemented in conjunction with bit-stream generators in the field of RF signal generation. Switching speeds of switching power amplifiers are limited by characteristics of the power transistors and the source-impedance of the driver included in the given switching power amplifier. These characteristics of the power transistor include gate-source capacitance, gate-drain capacitance, drain-source capacitance, common-source or common-gate or common-drain configuration and the like. It is therefore desirable to produce a method and system that mitigates the shortfalls of the prior art, thereby providing a switching power amplifier architecture with increased switched speeds and reduced power consumption.